Sunday, May 10, 2009

Buffers, Queues and Thresholds

When QoS is enabled on a 65xx switch, queues are automatically allocated based on architecture of the line card.

For example -
1p3q8t for 6748 and 6724 (10/100/1000 linecard)
1p7q8t for 6704 (4 ports 10G card)
1p7q4t for 6708 (8 ports 10G card)

Queue size, numbers and architecture are different based on line card.
Here is the detail list as of 2009.

show queueing interface command will give away a lot of information about the port and the linecard.

Queue configuration is applied to a block of ports per ASIC (Rohini on 6724 and 6748). For 6724, wrr algorithm and qos-map configuration applied on one port will affect all 12 ports of the same ASIC, and for 6748 all 8 ports of the same ASIC.

"default interface" on one of the ports will reset wrr allocation of queues but not the qos-map, if it were altered from default *

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